RTS=00, BCCS=00, DFCS=000
Control Register 2
| DFCS | RXDXn Signal Digital Filter Clock Select 0 (000): Filter is disabled. 1 (001): Filter clock is SCI base clock 2 (010): Filter clock is PCLK/8 3 (011): Filter clock is PCLK/16 4 (100): Filter clock is PCLK/32 5 (101): Filter clock is PCLK/64 6 (110): Filter clock is PCLK/128 7 (111): Setting prohibited |
| BCCS | Bus Collision Detection Clock Select 0 (00): SCI base clock 1 (01): SCI base clock frequency divided by 2 2 (10): SCI base clock frequency divided by 4 3 (11): Setting prohibited |
| RTS | RXDXn Reception Sampling Timing Select 0 (00): Rising edge of the 8th cycle of SCI base clock 1 (01): Rising edge of the 10th cycle of SCI base clock 2 (10): Rising edge of the 12th cycle of SCI base clock 3 (11): Rising edge of the 14th cycle of SCI base clock |